1. Field of the Invention
The present invention relates in general to scalable video processing and, more specifically, to a system and method for efficient parallel processing of video data.
2. Description of the Related Art
The Advanced Video Coding (AVC) standard, Part 10 of MPEG4 (Motion Picture Experts Group), otherwise known as H.264, includes advanced compression techniques that were developed to enable transmission of video signals at a lower bit rate or to enable improved video quality at a given transmission rate. The processing of video signals in accordance with the H.264 standard, or other standards, requires a very large amount of computational resources. For example, to encode a H.264 high-definition (HD) data stream for 720p@30 fps video in real-time, it is usually necessary to use a multi-core processor having clock speeds greater than 1 GHz. One of the most challenging aspects of digital signal processing relates to scenarios for dispatching tasks among multiple digital signal (DSP) processing cores. There is a need, therefore, for a system and method for balancing the processing load among multiple processing cores in a multi-core device.